In semiconductor integrated circuit (IC) manufacturing, the ICs are created on wafers of varying sizes using complicated fabrication processes with a large number of process steps. When a fault is detected on the wafer (or IC), it is the job of a process engineer (or a group of process engineers) to detect the location of the process fault, diagnose a root cause, and to make necessary corrections. With the wafers continuing to get larger and larger and the fabrication processes getting more complex, the likelihood of a process fault(s) occurring on a wafer also increases.
Faults are normally detected on a wafer during acceptance testing of the wafer. Wafer acceptance testing usually involves the placement of electrical leads onto test pads located within the dice located on the wafer. The electrical leads perform specified tests on the die and report back various measurements. The measurements may then be evaluated so that process engineers or computer-based testing applications may decide upon the acceptance of the wafer.
The measurements taken by the electrical leads may be provided to a process engineer, who will analyze the data to determine if faults are present on the wafer. If faults are present on the wafer, the process engineer may be able to detect the location of the process in which the fault occurred (i.e., the particular process step in the fabrication process that caused the fault), diagnose a root cause, and make any necessary corrections.
Alternatively, the measurements may be provided to a computer-based testing application, such as a testing application with a built-in expert system, and the computer-based testing application may be able to detect the location of the process fault, diagnose a root cause, and suggest necessary corrections to remedy the situation. Should the semiconductor fabrication line be automated to a sufficient degree, the computer-based testing application may be able to automatically apply its corrections.
One disadvantage of the prior art is that the use of humans (process engineers) to detect, diagnose, and fix process faults may result in process faults that remain for a long time in the fabrication process after they are detected. This may be caused by inherent inefficiencies associated with humans who must study and discuss the measurements to decide upon an appropriate action. Additionally, process faults may be detected at a time when humans are not available, for example, at odd hours or on weekends. Therefore, time may be wasted prior to the process fault measurement data being examined.
An additional disadvantage of the prior art is that the expertise level of the process engineers can vary significantly between different users. Therefore, process faults may be mis-diagnosed by relatively inexperienced process engineers, who may also take a considerable amount of time.
A third disadvantage of the prior art is that the use of computer-based testing applications with built-in expert systems function only as well as the quality of the inference rules that are being used. The creation of the inference rules may require a large investment in time to interview experienced process engineers, something that the process engineers may not be willing to provide.
Yet another disadvantage of the prior art is that the use of computer-based testing applications with built-in expert systems often require many different rules be created for the different possible process failures. This can lead to a complex testing application that may be difficult to create and maintain.